Co-events
SpacemiT DevCon 2026
A hands-on event for RISC-V developers and hardcore technology enthusiasts. Centered on the homogeneous fusion architecture of the K3 series and the Bianbu OS hardware-software stack, the event will present the latest developments in the open-source ecosystem, AI framework enablement, developer board program, and toolchains, and officially launch the Dev Partner Program. Following high-density keynotes, three areas will open for a developer salon, an in-depth hands-on workshop for 30 participants, and demos. Workshop winners will receive limited-edition K3 development boards.
RISC-V Summit China 2026 OpenAnolis Ecosystem Forum
How can RISC-V move beyond processors and server platforms toward verifiable, deployable datacenter applications? What issues still require coordination among operating systems, foundational software, and hardware platforms? The OpenAnolis RISC-V Ecosystem Collaboration Forum will continue the themes of datacenter applications and industry-academia collaboration through six technical talks and an industry roundtable, sharing technical progress and practical needs while exploring joint enablement, testing and validation, and open-source collaboration through the OpenAnolis community.
“One Student One Chip” and Tape-out-Ready Open-Source Chip Design Tutorial
“One Student One Chip” (ysyx.org) was launched by the University of Chinese Academy of Sciences in 2019 and has attracted more than 20,000 registrations from over 1,300 universities and research institutes worldwide. This tutorial focuses on ECOS Studio, an end-to-end open-source RISC-V chip design solution based on open-source EDA, IP, and PDK resources. It covers the complete RTL2GDSII design flow and includes guided hands-on use of ECOS Studio to advance RISC-V education and industry development.
X-EPIC Agentic EDA Digital Flow Solutions Workshop
As AI agents become part of chip design and verification, the value of Agentic EDA extends beyond faster content generation and task execution to delivering engineering results that can be proven, verified, traced, and governed. Built on an integrated system design and verification platform, X-EPIC's Agentic EDA platform brings agents into key stages of the workflow. Guided by Results-as-a-Service, it aims to move from isolated productivity gains to end-to-end delivery of trustworthy engineering results. This workshop will share experience and needs from real chip projects, offering engineers practical ideas and exploring repeatable paths to Agentic EDA deployment at scale.
XiangShan Ecosystem Conference
The XiangShan Ecosystem Conference brings together XiangShan developers, industry partners, and open-source enthusiasts to explore RISC-V innovation, open-source collaboration, and ecosystem development. The morning program focuses on developers, sharing the latest progress in the XiangShan open-source community, the RISC-V AI software stack, and the Kunminghu processor core IP and microarchitecture, alongside community recognition and technical discussions. The afternoon program addresses the broader industry, presenting XiangShan's achievements and roadmap, showcasing collaborative work across the open-source chip community, the SMT working group, and RISC-V AI, and bringing industry partners together to discuss real-world adoption.
Advancing Matrix Computing, Building the Ecosystem Together — AME Technical Workshop
In the era of AI computing, RISC-V matrix extensions are flourishing, with AME, IME, VME, and other approaches advancing in parallel. This workshop brings together leading international architects and hardware and software experts from China to share the latest developments in AME, introduce matrix extension approaches such as IME and VME, and explore the future of the matrix computing ecosystem. Join us for a comprehensive look at the next generation of RISC-V matrix instruction sets.