RISC-V SUMMIT CHINA 2026

RISC-V Summit China 2026 Call for Presentations

Organizer:
RISC-V International Open-Source Laboratory
Conference Dates:
October 18-20, 2026
Venue:
Shenzhen Convention & Exhibition Center (Futian)

The review results for the 6th RISC-V Summit China Call for Presentations were officially announced on September 21, 2026. Submitters can check the notification sent to their registered email address or sign in to the submission system to view the result and next steps. We sincerely thank every submitter for the care, expertise, and insight invested in their proposal, and we look forward to gathering in Shenzhen to exchange ideas, share practical experience, and celebrate the RISC-V community.

Submitters may sign in to the submission system to view review results and manage their submission. Accepted speakers must submit the required materials by October 11, 2026 (AoE) and monitor their registered email address for further notices.

Access Submission System

Key Dates

Submission Deadline

August 31, 2026 (AoE) Closed

Review Results Notification

September 21, 2026 Results announced

Summit Dates

October 18-20, 2026 In preparation

Seven Forum Tracks

This year's call for presentations covered the following seven forum tracks.

Each track accepted both academic research contributions and industrial deployment reports. Work previously presented at peer-reviewed venues (e.g., ISCA, MICRO, HPCA, ASPLOS, DAC, PLDI/CGO) was also within scope; the program committee will deliberately program research results alongside deployment experience within sessions.

  1. Artificial Intelligence

    Focuses on RISC-V's role across the full AI computing stack — from ISA standardization of matrix / vector extensions, compilers and operator libraries, to AI frameworks and runtimes, and on to system integration of cloud clusters and heterogeneous edge deployment.

  2. Datacenter / High-Performance Computing

    Focuses on platform-level deployment of application-class RISC-V in datacenter and high-performance computing, including server SoCs, firmware and boot, memory and interconnects, virtualization, cloud-native orchestration, confidential computing, and HPC scalability.

  3. Software Ecosystem

    Covers the general-purpose software ecosystem from toolchains, kernels, and firmware to distributions, language runtimes, JITs, debugging, performance analysis, and software-package ecosystems.

  4. Chip Design and Verification

    Covers the full design-verification chain, from microarchitecture, RTL design, and agile methodologies to formal verification, compliance testing, prototyping, tape-out, and open-source EDA.

  5. Automotive, Industrial and Robotics

    Targets RISC-V deployment in safety-critical and real-time domains, including automotive electronics, industrial control, robotics, low-altitude systems, aerospace, functional safety, and AUTOSAR adaptation.

  6. Embedded, IoT and Smart Hardware

    Targets resource-constrained embedded and IoT production scenarios, including MCUs, RTOS, low-power design, wireless connectivity, on-device AI, device security, trusted boot, and supply chains.

  7. Industry-Academia Collaboration, Innovation and Entrepreneurship

    Covers talent development, curriculum building, frontier research, open-source and standards collaboration, startups, and the investment ecosystem.